Systems for tunable nanocube plasmonic resonators and methods for forming

ABSTRACT

The present disclosure is directed to systems for tuning nanocube plasmonic resonators and methods for forming tunable plasmonic resonators. A tunable plasmonic resonator system can include a substrate and a nanostructure positioned on a surface of the substrate. The substrate can include a semiconductor material having a carrier density distribution. A junction can be formed between the nanostructure and the substrate forming a Schottky junction. Changing the carrier density distribution of the semiconductor material can change a plasmonic response of the plasmonic resonator.

CROSS-REFERENCE TO RELATED PATENT APPLICATIONS

The present application is a continuation of U.S. patent applicationSer. No. 15/092,367, filed Apr. 6, 2016, which is incorporated herein byreference in its entirety.

BACKGROUND

Resonators exhibit resonance or resonant behavior at certainfrequencies, called resonant frequencies. Oscillations in a resonatorcan be either electromagnetic or mechanical (including acoustic).Resonators can be used to either generate waves of specific frequenciesor to select specific frequencies from a signal. A plasmonic resonatorcouples to plasmons, which are waves associated with electromagneticfields and electron motion near the surface of a conducting orsemiconducting material. The wavelength of plasmons is typically severaltimes smaller than the wavelength of free-space electromagneticradiation of similar frequency, and plasmonic resonators may thereforebe comprised of relatively small structures as compared to a free-spacewavelength at their resonant frequency. For optical frequencies, suchstructures are typically tens of nanometers in size, and referred to asnanostructures (e.g., nanocubes), but similar structures and plasmonresonators may be fabricated at larger scales to operate with lowerfrequency plasmons, e.g., in the infrared or THz ranges. One form ofplasmonic resonator is comprised of a conductive nanostructure, such asa metallic nanocube, separated from a conductive substrate by a thin(few-nm at optical frequencies) dielectric (nonconducting) gap.

SUMMARY

The present disclosure is directed to systems for tuning nanocubeplasmonic resonators and methods for forming tunable plasmonicresonators. In one aspect, a first tunable plasmonic resonator system isprovided. The system includes a substrate and a nanostructure positionedon a surface of the substrate. The substrate may include a semiconductormaterial having a carrier density. A junction is formed between thenanostructure and the substrate forming a Schottky junction. Theplasmonic resonator system can be configured such that changing thecarrier density distribution changes a plasmonic response of theplasmonic resonator system.

In another aspect, a second tunable plasmonic resonator system isprovided. The system includes a substrate and an array of nanostructurespositioned on a surface of the substrate. The substrate may include asemiconductor material having a carrier density distribution. A junctionis formed between the array of nanostructures and the substrate formingan array of Schottky junctions. The system can be configured such thatchanging the carrier density distribution of the semiconductor materialtunes a plasmonic response of at least one plasmonic resonator in thearray of plasmonic resonators.

In another aspect, a third tunable plasmonic resonator system isprovided. The system includes a substrate, a nanostructure, and adielectric layer positioned between the substrate and the nanostructure.The substrate may include a semiconductor material. The semiconductormaterial may have a carrier density distribution. In an embodiment, theplasmonic response of the nanostructure can be controlled by varying thecarrier density distribution of the semiconductor material.

In another aspect, a fourth tunable plasmonic resonator system isprovided. The system includes a substrate having a semiconductormaterial. The system further includes an array of plasmonic resonatorsincluding an array of nanostructures and a dielectric layer positionedbetween the substrate and the array of nanostructures. The semiconductormaterial may have a carrier density distribution. In an embodiment, aplasmonic response of at least one plasmonic resonator can be controlledby varying the carrier density distribution.

In another aspect, a first method for forming a nanocube tunableplasmonic resonator is provided. The method includes forming a junctionbetween a nanostructure and a substrate. The substrate may include asemiconductor material having a carrier density distribution and thenanostructure may be positioned on a surface of the substrate. Themethod further includes applying a voltage between the nanostructure andthe substrate. The junction may be Schottky junction. The method furtherincludes tuning a plasmonic response of the plasmonic resonator bychanging the carrier density distribution of the semiconductor material.

In another aspect, a second method for forming an array of tunableplasmonic resonators is provided. The method includes forming aplurality of junctions between an array of nanostructures and asubstrate. The substrate may include a semiconductor material having acarrier density distribution and the array of nanostructures may bepositioned on a surface of the substrate. The method further includesapplying a voltage between the array of nanostructures and thesubstrate. The junction may be a Schottky junction. The method furtherincludes tuning a plasmonic response of at least one plasmonic resonatorin the array of plasmonic resonators by changing the carrier densitydistribution of the semiconductor material.

In another aspect, a third method for forming a tunable plasmonicresonator is provided. The method includes forming a dielectric layer ona substrate. The substrate may include a semiconductor material having acarrier density distribution. The method further includes depositing ananostructure on the dielectric layer of the substrate and applying avoltage between the nanostructure and the substrate. The method furtherincludes controlling the carrier density distribution to tune aplasmonic response of the plasmonic resonator.

In another aspect, a fourth method for forming an array of tunableplasmonic resonators is provided. The method includes forming adielectric layer on a substrate. The substrate may include asemiconductor material having a carrier density distribution. The methodfurther includes forming an array of plasmonic resonators by depositingan array of nanostructures on the dielectric layer of the substrate. Themethod further includes applying a voltage between the array ofnanostructures and the substrate. The method further includescontrolling the carrier density distribution to tune a plasmonicresponse of at least one plasmonic resonator.

The foregoing summary is illustrative only and is not intended to be inany way limiting. In addition to the illustrative aspects, embodiments,and features described above, further aspects, embodiments, and featureswill become apparent by reference to the drawings and the followingdetailed description.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram of a nanocube tunable plasmonic resonatorsystem in accordance with one embodiment.

FIG. 2 is a block diagram of a nanocube tunable plasmonic resonatorsystem according to another embodiment.

FIG. 3 is a flow diagram of a method for forming a nanocube tunableplasmonic resonator according to one embodiment.

FIG. 4 is a flow diagram of a method for forming a nanocube tunableplasmonic resonator according to one embodiment.

FIG. 5 is a block diagram of a tunable plasmonic resonator according toone embodiment.

FIG. 6 is a block diagram of a tunable plasmonic resonator according toone embodiment.

FIG. 7 is a flow diagram of a method for forming a nanocube plasmonicresonator according to one embodiment.

FIG. 8 is a flow diagram of a method for forming a nanocube tunableplasmonic resonator with an array of nanostructures according to oneembodiment.

DETAILED DESCRIPTION

In the following detailed description, reference is made to theaccompanying drawings, which form a part hereof. In the drawings,similar symbols typically identify similar components, unless contextdictates otherwise. The illustrative embodiments described in thedetailed description, drawings, and claims are not meant to be limiting.Other embodiments may be utilized, and other changes may be made,without departing from the scope of the subject matter presented here.

The method and systems described herein are directed to plasmonicresonators that can be modulated using an enhancement region or adepletion region. For example, plasmonic resonators can includenanocube-on-substrate resonators, which can be controlled by varying theproperties of an enhancement region or depletion region in the substratefor the resonator. A nanostructure can be formed as a switchable orcontrollable resonator by changing properties of a depletion region oran enhancement region positioned under the nanostructure. By alteringthe properties of the depletion region or the enhancement region underthe nanostructure, the plasmonic properties of the nanostructure can becontrolled and modulated. For a single nanocube, the plasmonicproperties that can be controlled include resonant frequency andresonance strength. For an array of nanocubes, the plasmonic propertiesthat can be controlled include an amplitude of plasmonic resonance(e.g., by changing a number of resonant nanostructures in the array orthe strength of the individual resonators), the frequency of theresonance, or the width or shape of the resonance (e.g., by varying adistribution of frequencies of individual resonators).

FIG. 1 depicts tunable plasmonic resonator system 100 in accordance withone embodiment. The tunable plasmonic resonator 100 includesnanostructure 100 positioned on a surface of a substrate 120. Substrate120 includes a semiconductor material. Between nanostructure 110 andsubstrate 120, junction 130 is formed that may be a Schottky junction.In some embodiments, the properties and characteristics of junction 130may be altered to tune a plasmonic response of nanostructure 110.

Nanostructure 110 may be a structure of intermediate size betweenmicroscopic and molecular structures. For example, the thickness ofnanostructure 110 may range from about 0.1 nanometers (nm) to about 100nm. Nanostructure 110 may be of various types, shapes, and sizes,including a cube, prism, brick, or sphere. For example, in oneembodiment, nanostructure 110 is a 70 nm nanocube. In some embodiments,nanostructure 110 is embedded in a fluid or solid matrix on the surfaceof substrate 120. Nanostructure 110 may include at least one ofaluminum, silver, or gold.

The plasmonic resonator 100 may be a plasmonic nanoparticle whoseelectrons can couple with electromagnetic radiation of wavelengths thatare far larger than the particle due to the nature of thedielectric-metal interface between the medium and the particle. When theelectromagnetic field interacts with conductive electrons at the metalinterface or metallic nanostructure an enhanced optical near field ofsub-wavelength can be achieved. The plasmonic resonator 100 may exhibitscattering, absorbance, and coupling properties based on its geometry,composition, and position relative to the surface of substrate 120. Insome embodiments, plasmonic resonators 100 may exhibit plasmonicproperties. Plasmonic properties may generally refer to how anelectromagnetic field interacts with the plasmonic resonator 100. Forexample, the plasmonic properties may include controlling whatwavelengths are absorbed versus reflected by the plasmonic resonator100. This may also be referred to as an optical response of plasmonicresonator 100. The plasmonic resonator 100 can be configured toselectively absorb at resonance frequency. In some embodiments, theproperties of a region (e.g., a depletion region, a dielectric region)can be controlled to tune a reflectance spectrum of the plasmonicresonator 100 over a range of wavelengths. The plasmonic resonator cancouple efficiently with electromagnetic radiation having wavelengthsmuch larger than the dimensions of nanostructure 110, due to theinteraction of the electromagnetic fields with the electric charges inthe nanoparticle and in the substrate. The coupled near-fieldoscillations of the fields and particles are described as plasmonicoscillations. The coupling of radiation with the plasmonic oscillationsaffects the absorption and scattering properties of the resonator 100when illuminated with electromagnetic radiation, and the electromagneticemission properties if the resonator is excited by other means such asmolecular transitions (fluorescent emission) within the resonator. Theinteraction with electromagnetic fields is enhanced at certainfrequencies corresponding to resonances in the plasmonic oscillations.

Substrate 120 may include a semiconductor material having a carrierdensity distribution. For example, substrate 120 may include silicon.Other possible semiconductor substrates include germanium, galliumarsenide, indium gallium arsenide, gallium phosphide, indium phosphide,etc. The substrate may include intrinsic (undoped) semiconductor, or maybe wholly or partially doped to control the density and distribution offree charge carriers (electrons or holes) in the substrate. In someembodiments, junction 130 is formed between nanostructure 110 andsubstrate 120. Junction 130 may be a Schottky junction, which produces aSchottky barrier. A Schottky barrier is a potential energy barrier forelectrons, which is formed at a metal-semiconductor junction. Forexample, a Schottky barrier may be formed between nanostructure 110 andsubstrate 120, producing a narrow region in the semiconductor which isdepleted of conduction electrons. This depletion region forms aninsulating layer between nanostructure 110 and the bulk of the substrate120.

In some embodiments, junction 130 is configured to allow control of theplasmonic response of plasmonic resonator 100 by changing the carrierdensity distribution in the semiconductor material of substrate 120. Forexample, the properties of nanostructure 110 can be adjusted by varyinga voltage applied between nanostructure 110 and substrate 120. Thevoltage may be provided between nanostructure 110 and substrate 120 by avoltage source to change junction 130 from an unbiased junction to abiased junction.

In some embodiments, junction 130 may be biased to increase the width ofthe depletion region produced by the Schottky junction, effectivelyincreasing the separation between nanostructure 110 and the bulkconducting region of substrate 120 and raising the resonant frequency ofthe nanoresonator. In some embodiments, junction 130 may be biased todecrease the width of the depletion region, effectively decreasing theseparation and lowering the resonant frequency. In some embodiments,junction 130 may be biased into conduction, eliminating the depletionregion and eliminating the resonant plasmonic response of resonator 100.In some embodiments, junction 130 may be reverse biased sufficientlythat the depletion region width becomes large compared to the plasmonwavelength, such that nanostructure 110 is effectively decoupled fromthe conducting part of substrate 120 and the remaining plasmon responseis approximately that of an isolated nanostructure 110.

Now referring to FIG. 2, FIG. 2 shows tunable plasmonic resonator 200according to another embodiment. Tunable plasmonic resonator 200includes an array of nanostructures 210 positioned on a surface ofsubstrate 220. Substrate 220 may include a semiconductor material havinga carrier density distribution. Junction 230 may be formed between thearray of nanostructures 210 and substrate 220. Junction 230 may beconfigured to tune a plasmonic response of each nanostructure 210 in thearray of nanostructures 210 by changing the carrier density distributionwithin the semiconductor material in substrate 220.

In an embodiment, substrate 220 and junctions 230 of tunable plasmonicresonator 200 illustrated in FIG. 2 may be similar to substrate 120 andjunction 130 described above with respect to tunable plasmonic resonator100 illustrated in FIG. 1. However, tunable plasmonic resonator 200illustrated in FIG. 2 is different from tunable plasmonic resonator 100illustrated in FIG. 1, in that tunable plasmonic resonator 200 includesthe array of nanostructures 210.

The array of nanostructures 210 may include nanostructures 210 of thesame type, shape, size, and properties. In other embodiments, the arraymay include nanostructures 210 of varying types, shapes, sizes, andproperties. For example, the array may include two or more differenttypes of nanostructures 210, two or more different sized nanostructures210, or two or more different shaped nanostructures 210. Eachnanostructure 210 may have different optical characteristics dependingon its own individual geometry.

The array of nanostructures 210 may be embedded in a fluid or a solidmatrix on a surface of substrate 220. In some embodiments, thenanostructures 210 in the array may be deposited in a random formation.In other embodiments, nanostructures 210 are deposited in a patternedformation. For example, each nanostructure 210 may be spaced at apre-determined distance from a neighboring nanostructure 210 on thesurface of substrate 220. In some embodiments, nanostructures 210 may beselectively deposited on the surface of the substrate through a mask tocreate active and non-active areas (i.e., pixels).

The surface of substrate 220 may be coated to control the placement ofnanostructures 210 on the surface. For example, the surface of substrate220 may be selectively coated to form active and non-active areas.Nanostructures 210 may be attracted to the various areas of the surfacebased on the coating applied. The coating may either prevent depositionor adherence of nanostructures 210 to different areas of the surface ofsubstrate 220. The coating can also be used to control the spacingbetween the nanostructures, by controlling what areas the nanostructuresof the surface of substrate 220 nanostructures 210 are attracted to. Insome embodiments, a transparent conductor or a transparent conductorfilm, such as indium tin oxide (ITO), can be applied to a surface ofsubstrate 220 to couple nanostructures 210 to the surface of substrate220.

FIG. 3 depicts a flow diagram of a method 300 for forming a nanocubetunable plasmonic resonator according to one embodiment. In briefoverview, the method 300 includes forming a junction between ananostructure and a substrate (310). The method further includesapplying a voltage between the nanostructure and the substrate (320).The method further includes tuning a plasmonic response of thenanostructure by changing a carrier density distribution within thesubstrate (330).

In an embodiment, the junction may be formed between the nanostructureand the substrate (310). In some embodiments, the junction is a Schottkyjunction (e.g., Schottky barrier, Schottky diode) formed between a metaland a semiconductor material. The nanostructure may be at least one ofaluminum, silver, or gold. The substrate may include a semiconductormaterial, such as silicon. Other possible semiconductor substratesinclude germanium, gallium arsenide, indium gallium arsenide, galliumphosphide, indium phosphide, etc. The semiconductor material may have acarrier density. The carrier density may refer to a measure of thedensity of electrons in the semiconductor material, such as the numberof charge carriers per unit volume. The semiconductor may be wholly orpartially doped to control the density and distribution of free chargecarriers (electrons or holes) in the substrate.

To form the junction, the nanostructure may be deposited on a surface ofthe substrate. For example, the nanostructure may be deposited from aliquid or fluid onto the surface of the substrate. Nanostructures mayalso be deposited by individually being placed on the surface of thesubstrate, mechanically scattered on the surface of the substrate, bylithographic processes (e.g., etching), by nanoimprinting, etc. Thenanostructures may be embedded in a solid or liquid after deposition.

In some embodiments, a voltage is applied between the nanostructure andthe substrate (320). The voltage can be used to control the propertiesof the junction. The voltage may be applied using a voltage source, suchas a pair of electrodes. For example, a first electrode may be coupledto a surface of the nanostructure and a second electrode may be coupledto a bottom surface of the substrate. In other embodiments, a firstelectrode may be coupled to a first side of the substrate and a secondelectrode may be coupled to a second side of the substrate.

In some embodiments, a control beam is used to control the properties ofthe junction. The control beam may be an electromagnetic radiationhaving a photon energy at or above a bandgap of the semiconductormaterial in the substrate. The control beam may propagateelectromagnetic radiation through the nanostructure and the substrate tochange properties of the junction.

The method further includes tuning a plasmonic response of thenanostructure by changing a carrier density distribution of thesubstrate (330). As the voltage is applied between the nanostructure andthe substrate, the charge carriers in the substrate may move to thenanostructure, changing the carrier density of the substrate. Bycontrolling the amount of voltage applied between the nanostructure andthe substrate, a voltage-tunable or a voltage-switchable resonator canbe created.

In some embodiments, the nanostructures are particles (e.g., plasmonicnanoparticles) whose electrons can couple with electromagnetic radiationof wavelengths that are far larger than the nanostructure due to thenature of the dielectric-metal interface between the medium and theparticles. By tuning or adjusting the electron density of thenanostructure the plasmonic response or optical response of thenanostructure can be modulated. The properties of the nanostructure canbe controlled using the depletion region to change or modify absorptiveor reflective characteristics of the nanostructure in response to lightor electromagnetic radiation. For example, in one embodiment, theresonance frequency of the nanostructure can be modulated. In someembodiments, a reflectance spectrum corresponding to the nanostructurecan be tuned over a range of wavelengths.

FIG. 4 depicts a flow diagram of a method 400 for forming an array oftunable plasmonic resonators according to one embodiment. In briefoverview, the method 400 includes forming a plurality of junctionsbetween an array of nanostructures and a substrate (410). The methodfurther includes applying a voltage between the array of nanostructuresand the substrate (420). The method further includes modifyingproperties of the junction (430). The method further includes tuning aplasmonic response of at least one plasmonic resonator in the array ofplasmonic resonators by changing a carrier density distribution ofsemiconductor material of the substrate (440).

A plurality of junctions (e.g., an array of junctions) may be formedbetween each of an array of corresponding nanostructures and a substrate(410). In some embodiments, the junction is a Schottky junction (e.g.,Schottky barrier, Schottky diode) formed between a metal and asemiconductor material. The array of nanostructures may includenanostructures of the same type, size, shape, and properties. In otherembodiments, the array includes nanostructures of varying type, size,shape, or properties. The nanostructures may be at least one ofaluminum, silver, or gold. The substrate may include a semiconductormaterial, such as silicon. Other possible semiconductor substratesinclude germanium, gallium arsenide, indium gallium arsenide, galliumphosphide, indium phosphide, etc. The semiconductor material may have acarrier density. The carrier density may refer to a measure of thedensity of electrons in the semiconductor material, such as the numberof charge carriers per unit volume. The semiconductor may be wholly orpartially doped to control the density and distribution of free chargecarriers (electrons or holes) in the substrate.

To form the junction, the array of nanostructures may be deposited on asurface of the substrate as disclosed herein. The nanostructures in thearray may be positioned in a random formation. In other embodiments, thenanostructures in the array are positioned in a defined order. Forexample, the nanostructures may be positioned at a pre-determineddistance from each other.

In some embodiments, active and non-active areas (i.e., pixels) arecreated on the surface of the substrate using a selective placement ofthe nanostructures through a mask. After the nanostructures have beenplaced on the substrate, some nanostructures may be selectively removedto create active and non-active areas on the surface of the substrate.The surface of the substrate may be selectively coated to controlplacement of the nanostructures and to form active and non-active areas.The coating applied to the surface of the substrate may preventdeposition or adherence of the nanostructures to certain areas on thesurface. In some embodiments, the coating may be used to control spacingof the nanostructures on the surface of the substrate. Thenanostructures can be coupled to the surface of the substrate using atransparent conductor or a transparent conductor film, such as indiumtin oxide (ITO).

In some embodiments, contacts may be patterned on one or both sides ofthe substrate to form a matrix of separately controllable areas (i.e.,pixels). The nanostructures may be positioned relative to these areas,for example, to form resonators only in the central part of eachcontrollable area, avoiding edges where electric fields and depletionthicknesses are potentially nonuniform.

In some embodiments, a voltage is applied between the array ofnanostructures and the substrate (420). The voltage can be used tocontrol the properties of the junction. The voltage may be applied usinga voltage source, such as a pair of electrodes. For example, a firstelectrode may be coupled to a surface of the array of nanostructures anda second electrode may be coupled to a bottom surface of the substrate.In other embodiments, a first electrode may be coupled to a first sideof the substrate and a second electrode may be coupled to a second sideof the electrode. In some embodiments, a control beam may be used tocontrol the properties of the junction. The control beam may be anelectromagnetic radiation having a photon energy at or above a bandgapof the semiconductor material in the substrate.

The method further includes modifying properties of the junction (430).In some embodiments, the voltage can be used to change the junction froman unbiased junction to a biased junction. Biasing may refer to theability of electrons to move from the semiconductor material, throughthe Schottky barrier, into a nanostructure in the array ofnanostructures. In an unbiased state, no electrons move between thesemiconductor material and the nanostructures in the array. In a biasedstate, electrons may move freely from the semiconductor material to thenanostructures. In some embodiments, the movement of electrons creates adepletion region in the semiconductor material under the variousnanostructures in the array. In some embodiments, an array of depletionregions is created under the array of nanostructures.

The method further includes tuning a plasmonic response of at least oneplasmonic resonator in the array of plasmonic resonators by changing acarrier density distribution within the substrate (440). As the voltageis applied between the array of nanostructures and the substrate, thecharge carriers in the substrate may move to a nanostructure above arespective depletion region, changing the carrier density of thesubstrate. By controlling the amount of voltage applied between thenanostructures and the substrate, a voltage-tunable or a voltageswitchable resonator can be created. In some embodiments, thenanostructures have varying properties and can create two or moredifferent types of resonators having different wavelengths and/orswitching properties.

Now referring to FIG. 5, tunable plasmonic resonator 500 is illustratedaccording to one embodiment. Tunable plasmonic resonator 500 includesnanostructure 510, substrate 520, and dielectric layer 530 positionedbetween nanostructure 510 and substrate 520. In some embodiments, thecarrier density distribution within substrate 520 may be changed to tunea plasmonic response of nanostructure 510.

Nanostructure 510 may be a structure of intermediate size betweenmicroscopic and molecular structures. For example, the thickness ofnanostructure 510 may range from about 0.1 nanometers (nm) to about 100nm. Nanostructure 510 may be of various types, shapes, and sizes,including a cube, prism, brick, or sphere. For example, in oneembodiment, nanostructure 510 is a 70 nm nanocube. In some embodiments,nanostructure 510 is embedded in a fluid or solid matrix on the surfaceof the substrate 520. Nanostructure 510 may include at least one ofaluminum, silver, or gold. Substrate 520 includes a semiconductormaterial having a carrier density distribution. For example, substrate520 may include silicon. Other possible semiconductor substrates includegermanium, gallium arsenide, indium gallium arsenide, gallium phosphide,indium phosphide, etc. The substrate may be wholly or partially doped tocontrol the density and distribution of free charge carriers (electronsor holes) near the surface of the substrate in the absence of appliedvoltages.

In some embodiments, dielectric layer 530 is formed on a surface ofsubstrate 520. Dielectric layer 530 may be a few nanometers thick (e.g.,less than 10 nm). In some embodiments, dielectric layer 530 includes adielectric material that is an electrical insulator and can be polarizedby an applied electric field. For example, the dielectric material maybe controlled using an electric field created by voltage source 550.Voltage source 550 may include a pair of electrodes. For example, a pairof electrodes positioned adjacent to tunable plasmonic resonator 500 asillustrated in FIG. 5. In other embodiments, of the pair of electrodes,one electrode is in nanostructure 510 and one electrode is in substrate520.

In some embodiments, the electric field is generated by incidentradiation from a control beam. The control beam can be used to controlthe properties of dielectric layer 530. The control beam may be anincident electromagnetic radiation that propagates through nanostructure510 and substrate 520. The control beam may include a photon energygreater than or equal to a bandgap of the semiconductor material insubstrate 520.

In some embodiments, a variable or switchable enhancement region ordepletion region is formed under nanostructure 510 using dielectriclayer 530. For example, the depletion region may be formed in substrate520. The generated electric field may be used to alter the propertiesand characteristics of substrate 520 to tune the plasmonic response ofnanostructure 510. For example, the generated electric field may be usedto alter a thickness of a depletion region in substrate 520 to tune theplasmonic response of nanostructure 510.

In some embodiments, substrate 520 may be formed into ametal-oxide-semiconductor (MOS) device or similar gate like structure.Gate 540 may be formed on the surface of substrate 520, for example indielectric layer 530. Gate 540 may include a layer of metal orpolycrystalline silicon deposited on top of dielectric layer 530. Insome embodiments, nanostructure 510 is deposited on top of gate 540 toform a nanocube resonator. In some embodiments, substrate 520 mayinclude circuitry components, including a complementary metal-oxidesemiconductor (CMOS) logic gate, memory, or gate drivers.

Now referring to FIG. 6, tunable plasmonic resonator 600 is illustratedaccording to one embodiment. Tunable plasmonic resonator 600 includes anarray of nanostructures 610, substrate 620, and dielectric layer 630positioned between nanostructure 610 and substrate 620. In someembodiments, the carrier density distribution within substrate 620 ischangeable to tune a plasmonic response of nanostructure 610.

In an embodiment, substrate 620 and dielectric layer 630 of tunableplasmonic resonator 600 illustrated in FIG. 6 are similar to thesubstrate 520 and the dielectric layer 530 described above with respectto FIG. 5. However, tunable plasmonic resonator 600 illustrated in FIG.6 is different from the tunable plasmonic resonator 500 illustrated inFIG. 5, in that tunable plasmonic resonator 600 includes the array ofnanostructures 610.

The array of nanostructures 610 may be deposited on dielectric layer 630of the substrate 620. The array may include nanostructures 610 of thesame type, with similar characteristics, such as size and shape. In someembodiments, the array includes nanostructures of varying types withdifferent shapes and sizes. Nanostructures 610 may have differentcharacteristics, including different resonance wavelengths.

In some embodiments, the array of nanostructures 610 may be deposited onthe dielectric layer 630 in a manner similar to other depositionprocesses disclosed herein. Each of the nanostructures 610 in the arraymay be deposited in a random formation. In other embodiments,nanostructures 610 may be deposited in a patterned formation. Forexample, each nanostructure 610 may be deposited and spaced at apre-determined distance from a neighboring nanostructure 610 on thesurface of the dielectric layer 630.

In some embodiments, nanostructures 610 may be selectively deposited onthe surface of substrate 620 through a mask. For example, nanostructures610 may be deposited such that they are aligned with (e.g., on top of)at least one gate 640 formed into dielectric layer 630. The surface ofdielectric layer 630 may be coated to control the placement ofnanostructures 610 on the surface. For example, the surface ofdielectric layer 630 may be selectively coated to form resonators onlyon gates 640. The coating may be used to prevent deposition or adherenceof nanostructures 610 to areas on the surface of dielectric layer 630not corresponding to at least one gate 640. In some embodiments, thecoating is used to space nanostructures 610 such that they are spacedaway from the surface and prevent formation of depletion regionresonators in a frequency range of interest.

Substrate 640 may include a semiconductor material such as silicon.Dielectric layer 630 may include silicon dioxide. In some embodiments,the dielectric layer 630 has a varying thickness. For example,dielectric layer 630 may include a first dielectric region located undera first nanostructure 610 that has a first thickness. Dielectric layer630 may also include a second dielectric region under a secondnanostructure 610 having a second thickness different from the firstthickness.

In some embodiments, gates 640 may be formed into dielectric layer 630.For example, substrate 620 may be formed such that is it a MOS device orsimilar gate like structure. An array of gates 640 may be formed into asurface of dielectric layer 630 to couple with nanostructures 610. Gates640 may include a metal or polycrystalline silicon. In some embodiments,the array of gates 640 may include gates 640 with similar properties andcharacteristics. In other embodiments, the array may include gates 640with different characteristics and properties. For example, the arraymay include gates 640 with different doping levels and/or thicknesses.

In some embodiments, voltage source 650 is coupled to tunable plasmonicresonator 600. In some embodiments, the carrier density distribution ofsubstrate 620 may be controlled using an electric field created byvoltage source 650. Voltage source 650 may include a pair of electrodes.For example, a pair of electrodes may be positioned adjacent to tunableplasmonic resonator 600 as illustrated in FIG. 6. Voltage source 650 canbe used to control and modify a thickness of dielectric layer 630.

FIG. 7 depicts a flow diagram of a method 700 for forming a plasmonicresonator according to one embodiment. In brief overview, the method 700includes forming a dielectric layer on a substrate (710). The methodfurther includes depositing a nanostructure on the dielectric layer ofthe substrate (720). The method further includes applying a voltagebetween the nanostructure and the substrate (730). The method furtherincludes controlling a carrier density distribution of semiconductormaterial of the substrate to tune a plasmonic response of the plasmonicresonator (740).

In some embodiments, a dielectric layer is formed in or on a substrate(710). The substrate may include a semiconductor material such assilicon. The dielectric layer may be a glass, plastic or oxides ofvarious metals, for example silicon dioxide. The thickness of thedielectric layer may range from about 0.1 nm to about 10 nm.

In some embodiments, the substrate is formed such that it is ametal-oxide-semiconductor (MOS) device or similar gate like structure.For example, in one embodiment, a silicon dioxide dielectric layer isformed on a top surface of a silicon substrate. A layer of metal orpolycrystalline silicon may then be deposited on top of the dielectriclayer to serve as a conducting gate for the MOS like device. In someembodiments, the substrate may include circuitry components, including acomplementary metal-oxide semiconductor (CMOS) logic gate, memory, orgate drivers.

In some embodiments, the method includes depositing a nanostructure onthe dielectric layer of the substrate (720). The nanostructure may beembedded in a liquid or fluid on a surface of the dielectric layer afterbeing deposited. The nanostructure may be selectively positioned, suchas in a pre-determined position on the surface of the dielectric layer,or randomly positioned on the surface. In some embodiments, the surfaceof the dielectric layer may be patterned to identify a position forplacement of the nanostructure.

In some embodiments, the substrate (e.g., dielectric layer) may beselectively coated to control the placement and location of thenanostructure on the surface of the dielectric layer. For example, thesubstrate may be selectively coated to form a resonator only over thegate. The selective coating may prevent deposition or adherence of thenanostructure at locations on the surface of the dielectric layer wherethere is not gate.

The method further includes applying a voltage between the nanostructureand the substrate (730). A voltage source may be used to apply a voltageor an electric field to the nanostructure and the substrate. In someembodiments, the voltage source includes a pair of electrodes. Forexample, in one embodiment, a first electrode is coupled to thenanostructure and the second electrode is coupled to the substrate. Thepair of electrodes can apply a voltage between the nanostructure and thesubstrate. In other embodiments, a pair of adjacent electrodes apply anelectric field to the substrate. For example, a first electrode iscoupled to a first side of the substrate and a second electrode iscoupled to a second side of the substrate. The pair of electrodes cangenerate an electric field to control and change characteristics of thesubstrate. The voltage can be used to control the properties of thedielectric layer of the substrate. In some embodiments, a control beammay be used to control properties of the substrate. For example,incident radiation from the control beam may be applied to thenanostructure and the substrate to change properties of the substrate.

The method further includes controlling the carrier density distributionof the semiconductor material of the substrate to tune a plasmonicresponse of the plasmonic resonator (740). By varying an applied voltageapplied, the properties of the substrate, more specifically theenhancement region or depletion region adjacent to the surface can becontrolled, including a thickness of the enhancement region or depletionregion. For example, the thickness of the enhancement region or thedepletion region can be altered by applying a voltage. In an embodiment,a negative voltage may be applied to a gate created on the dielectriclayer and cause negatively charged conduction electrons in thesemiconductor nearest the gate to be repelled by the negative charge.The negatively charged electrons may exit through a bottom contact andleave behind a depletion region. By varying the voltage applied, thecarrier density distribution of the depletion region can be controlled.For example, the greater the negative charge placed on the gate, themore negative the applied gate voltage, and the more electrons thatleave the semiconductor surface, enlarging the depletion region.

In some embodiments, the depletion region is formed under thenanostructure and can be used to tune plasmonic properties of thenanostructure including a plasmonic response of the nanostructure. Bychanging the carrier density (i.e., electron density) under thenanostructure the plasmonic properties of the nanostructure can becontrolled. The plasmonic properties may generally refer to how anelectromagnetic field interacts with the nanostructure. For example, theplasmonic properties may include controlling what wavelengths areabsorbed versus reflected by the nanostructure. This may also bereferred to as an optical response of the nanostructure. Thenanostructures can be configured to selectively absorb at resonancefrequency. In some embodiments, the resonance frequency of thenanostructure can be modulated. The properties of the dielectric layercan be controlled to tune a reflectance spectrum of the nanostructureover a range of wavelengths.

FIG. 8 depicts a flow diagram of a method 800 for forming a nanocubetunable plasmonic resonator with an array of nanostructures. In briefoverview, the method 800 includes forming a dielectric layer on asubstrate (810). The method further includes depositing an array ofnanostructure on the dielectric layer of the substrate (820). The methodfurther includes applying a voltage between the array of nanostructuresand the substrate (830). The method further includes controlling acarrier density distribution of semiconductor material of the substrateto tune a plasmonic response of at least one plasmonic resonator of thearray of plasmonic resonators (840).

In some embodiments, a dielectric layer is formed in or on a substrate(810). The substrate may include a semiconductor material such assilicon. Other possible semiconductor substrates include germanium,gallium arsenide, indium gallium arsenide, gallium phosphide, indiumphosphide, etc. The substrate may be wholly or partially doped tocontrol the density and distribution of free charge carriers (electronsor holes) near the surface of the substrate in the absence of appliedvoltages. The dielectric layer may be a glass, plastic or oxide ofvarious metals, for example silicon dioxide. The thickness of thedielectric layer may range from about 0.1 nm to about 10 nm. In someembodiments, the dielectric layer may be formed with two or moredifferent thicknesses.

In some embodiments, the substrate is formed such that is it ametal-oxide-semiconductor (MOS) device or similar gate like structure.For example, in one embodiment, a silicon dioxide dielectric layer isformed on a top surface of a silicon substrate. A layer of metal orpolycrystalline silicon may then be deposited on top of the dielectriclayer to serve as a conducting gate for the MOS like device. Thesubstrate can be formed to create an array of gates on the surface ofthe dielectric layer. In some embodiments, the gate structures may havetwo or more different doping levels and thicknesses. In someembodiments, the substrate may include circuitry components, including acomplementary metal-oxide semiconductor (CMOS) logic gate, memory, orgate drivers.

In some embodiments, the method includes depositing an array ofnanostructures on the dielectric layer of the substrate to form an arrayof plasmonic resonators (820). In some embodiments, two or morenanostructures are deposited on the surface of the dielectric layer,such as an array of nanostructures. The array of nanostructures mayinclude nanostructures of the same type, shape, size, and properties. Inother embodiments, the array includes nanostructures of varying types,shapes, sizes, and properties. For example, the array may include two ormore different types of nanostructures, two or more different sizednanostructures, or two or more different shaped nanostructures.

The nanostructures in the array may be deposited according to variousprocesses disclosed herein. Each nanostructure in the array may berandomly spaced relative to another nanostructure on the surface of thedielectric layer. In some embodiments, the nanostructures areselectively patterned on the surface of the dielectric layer. Forexample, the nanostructure may be selectively positioned on one or moregates created on the dielectric layer through a mask. The nanostructuresmay be selectively positioned using a nanoprinting procedure or ananoassembly procedure. The nanostructures may also be depositeduniformly on the surface, such as in a pre-defined pattern orarrangement. In some embodiments, nanostructures may be selectivelyremoved from the surface of the dielectric layer to leave a desireddensity of nanostructures on the surface or on gates.

In some embodiments, the substrate (e.g., dielectric layer) may beselectively coated to control the placement and location ofnanostructures on the surface of the dielectric layer. For example, thesubstrate may be selectively coated to form resonators only over gates.The selective coating may prevent deposition or adherence of thenanostructures to locations on the surface of the dielectric layer wherethere is not gate.

The method further includes applying a voltage between the array ofnanostructures and the substrate (830). A voltage source may be used toapply a voltage or an electric field to the array of nanostructures andthe substrate. In some embodiments, the voltage source includes a pairof electrodes. For example, in one embodiment, a first electrode iscoupled to the array of nanostructures and a second electrode is coupledto the substrate. The pair of electrodes can apply a voltage between thearray of nanostructures and the substrate. In other embodiments, a pairof adjacent electrodes can apply an electric field to the substrate. Forexample, a first electrode is coupled to a first side of the substrateand a second electrode is coupled to a second side of the substrate. Thepair of electrodes can generate an electric field to control and changecharacteristics of the substrate. The voltage can be used to control theproperties of the dielectric layer of the substrate. In someembodiments, a control beam may be used to control properties of thesubstrate. For example, incident radiation from the control beam may beapplied to the array of nanostructures and the substrate to changeproperties of the substrate.

The method further includes controlling a carrier density distributionof semiconductor material of the substrate to tune a plasmonic responseof at least one plasmonic resonator (840). By varying a voltage applied,the properties of the substrate, more specifically the enhancementregion or depletion region adjacent to the surface can be controlled,including a thickness of the enhancement region or the depletion region.For example, the thickness of the depletion region can be altered byapplying a voltage. The voltage can change a carrier densitydistribution of the substrate. In an embodiment, a negative voltage maybe applied to a gate created on the dielectric layer and causenegatively charged conduction electrons in the semiconductor nearest thegate to be repelled by the negative charge. The negatively chargedelectrons may exit through a bottom contact and leave behind a depletionregion. By varying the voltage applied, the carrier density distributionof the depletion region can be controlled. For example, the greater thenegative charge placed on the gate, the more negative the applied gatevoltage, and the more electrons that leave the semiconductor surface,enlarging the depletion region.

In some embodiments, an array of depletion regions is formed under eachof the nanostructures and can be used to tune plasmonic properties ofeach nanostructure including a plasmonic response of each nanostructure.By changing the carrier density distribution (e.g., distribution ofcharge carries such as electrons) under the nanostructure the plasmonicproperties of each nanostructure can be controlled. In some embodiments,the nanostructures in the array may have varying properties. Forexample, the array of nanostructures may form two or more differenttypes of resonators (e.g., center wavelengths). The resonators may beformed on two or more different sized or shaped nanostructures.

As stated above, the gate structures and dielectric layers in an arrayof controllable depletion regions may have varying characteristics. Insome embodiments, the gate structures have two or more different dopinglevels and thicknesses. For example, a first depletion region under afirst gate structure may have a different thickness due to an appliedvoltage than a second depletion region under a second gate structure.

The construction and arrangement of the systems and methods as shown inthe various embodiments are illustrative only. Although only a fewembodiments have been described in detail in this disclosure, manymodifications are possible (e.g., variations in sizes, dimensions,structures, shapes and proportions of the various elements, values ofparameters, mounting arrangements, use of materials, colors,orientations, etc.). For example, the position of elements may bereversed or otherwise varied and the nature or number of discreteelements or positions may be altered or varied. Accordingly, all suchmodifications are intended to be included within the scope of thepresent disclosure. The order or sequence of any process or method stepsmay be varied or re-sequenced according to alternative embodiments.Other substitutions, modifications, changes, and omissions may be madein the design, operating conditions and arrangement of the embodimentswithout departing from the scope of the present disclosure.

The present disclosure contemplates methods, systems and programproducts on any machine-readable media for accomplishing variousoperations. The embodiments of the present disclosure may be implementedor modeled using existing computer processors, or by a special purposecomputer processor for an appropriate system, incorporated for this oranother purpose, or by a hardwired system. Embodiments within the scopeof the present disclosure include program products comprisingmachine-readable media for carrying or having machine-executableinstructions or data structures stored thereon. Such machine-readablemedia can be any available media that can be accessed by a generalpurpose or special purpose computer or other machine with a processor.By way of example, such machine-readable media can comprise RAM, ROM,EPROM, EEPROM, CD-ROM or other optical disk storage, magnetic diskstorage or other magnetic storage devices, or any other medium which canbe used to carry or store desired program code in the form ofmachine-executable instructions or data structures and which can beaccessed by a general purpose or special purpose computer or othermachine with a processor. When information is transferred or providedover a network or another communications connection (either hardwired,wireless, or a combination of hardwired or wireless) to a machine, themachine properly views the connection as a machine-readable medium.Thus, any such connection is properly termed a machine-readable medium.Combinations of the above are also included within the scope ofmachine-readable media. Machine-executable instructions include, forexample, instructions and data which cause a general purpose computer,special purpose computer, or special purpose processing machines toperform a certain function or group of functions.

Although the figures may show a specific order of method steps, theorder of the steps may differ from what is depicted. Also two or moresteps may be performed concurrently or with partial concurrence. Allsuch variations are within the scope of the disclosure. Likewise,software implementations could be accomplished with standard programmingtechniques with rule-based logic and other logic to accomplish thevarious connection steps, processing steps, comparison steps anddecision steps.

While various aspects and embodiments have been disclosed herein, otheraspects and embodiments will be apparent to those skilled in the art.The various aspects and embodiments disclosed herein are for purposes ofillustration and are not intended to be limiting, with the true scopebeing indicated by the following claims.

What is claimed is:
 1. A tunable plasmonic resonator system, comprising:a substrate, wherein the substrate includes a semiconductor materialhaving a carrier density distribution; an array of plasmonic resonatorscomprising an array of nanostructures coupled to the substrate; and adielectric layer positioned between the substrate and the array ofnanostructures; wherein a plasmonic response of at least one plasmonicresonator is variable by varying the carrier density of the dielectriclayer.
 2. The system of claim 1, wherein the semiconductor materialincludes one of silicon, germanium, gallium arsenide, indium galliumarsenide, gallium phosphide, or indium phosphide.
 3. The system of claim1, further comprising a voltage source, wherein the voltage source isconfigured to provide a voltage between the substrate and the array ofnanostructures.
 4. The system of claim 3, wherein the voltage sourceincludes a pair of electrodes positioned adjacent to the substrate. 5.The system of claim 1, wherein the properties of the dielectric layerare adjustable by varying the voltage applied between the array ofnanostructures and the substrate.
 6. The system of claim 1, wherein athickness of the dielectric layer is adjustable by varying the voltageapplied between the array of nanostructures and the substrate.
 7. Thesystem of claim 1, wherein the plasmonic response of at least oneplasmonic resonator corresponds to a response to an incident light. 8.The system of claim 1, wherein varying the carrier density distributionchanges an absorption spectrum of at least one nanostructure.
 9. Thesystem of claim 1, wherein varying the carrier density distributionchanges a resonance wavelength of at least one nanostructure.
 10. Thesystem of claim 1, wherein varying the carrier density distributionmodifies a reflectance spectrum of at least one nanostructure.
 11. Thesystem of claim 1, wherein the array of nanostructures is embedded in afluid matrix or a solid matrix on the surface of the substrate.
 12. Thesystem of claim 1, wherein the array of nanostructures includes at leastone of aluminum, silver, or gold.
 13. The system of claim 1, wherein atleast one nanostructure in the array of nanostructures is a nanocube.14. A method for forming an array of tunable plasmonic resonators,comprising: forming a dielectric layer on a substrate, wherein thesubstrate includes a semiconductor material having a carrier densitydistribution; forming an array of plasmonic resonators by depositing anarray of nanostructures on the dielectric layer; applying a voltagebetween the array of nanostructures and the substrate; and controllingthe carrier density distribution to tune a plasmonic response of atleast one plasmonic resonator.
 15. The method of claim 14, wherein thesubstrate is a metal-oxide-semiconductor device including a gatestructure.
 16. The method of claim 14, further comprising generating amagnetic field using a pair of electrodes positioned adjacent to thesubstrate.
 17. The method of claim 14, further comprising varying thevoltage applied between the array of nanostructures and the substrate toadjust the properties of the dielectric layer.
 18. The method of claim14, further comprising varying the voltage applied between the array ofnanostructures and the substrate to adjust the thickness of thedielectric layer.
 19. The method of claim 14, wherein the plasmonicresponse of at least one plasmonic resonator corresponds to a responseto an incident light.
 20. The method of claim 14, further comprisingtuning an absorption spectrum of at least one nanostructure bycontrolling the carrier density distribution.